gm/Id Sizer

The deterministic gm/Id pipeline, used for PTM nodes and foundry PDKs. With current fixed by KCL and a gm/Id target chosen per device, a SPICE-characterised LUT turns IDS/W straight into W, so geometry is computed in one forward pass rather than searched. gm/Id — Gmid Sizer is the orchestrator (size_gmid()) that runs the five phases: Analyze (gm/Id — Analyze (Phase 1)) builds the structural view; Plan (gm/Id — Plan (Phases 2+3)) assigns bias currents and per-device gm requirements; Size places geometry, then repairs the DC bias (gm/Id — DC Bias (Phase 4b)); and Evaluate (gm/Id — Evaluate (Phase 5)) computes the analytical metrics. Supporting these are gm/Id — Blocks and gm/Id — Intent (the role/gm-Id tagging), gm/Id — Geometry (the LUT → W/L core), and gm/Id — Resistors / gm/Id — Bias Levels (the resistor network and bias-level tuning). The full walk-through is in gm/Id Sizing Flow.

• gm/Id — Gmid Sizer
• gm/Id — Analyze (Phase 1)
• gm/Id — Plan (Phases 2+3)
• gm/Id — DC Bias (Phase 4b)
• gm/Id — Evaluate (Phase 5)
• gm/Id — Blocks
• gm/Id — Intent
• gm/Id — Geometry
• gm/Id — Resistors
• gm/Id — Bias Levels