Template Taxonomy

Template taxonomy: the slot- and net-naming conventions the sizer assumes.

Single source of truth for every naming assumption the sizer makes about a circuit template — which FBR slot names exist, how they map onto bias-current groups, and which net names are supply/bias rails. A new topology whose slots follow these conventions needs no sizer changes; a topology that introduces new slot names or bias-net conventions is supported by extending the groups here (and only here).

Shared by the Level-1 analytical sizer and the gm/Id pipeline.

circuitgenome.sizer.shared.taxonomy.is_signal_device(device)

True if device’s gate is driven by a signal net (not a bias rail).

The signal transistor of a gain stage is the one whose gate is the previous stage’s output; the partner device is a current-source load (gate on a bias net). Used to pick the gm-contributing device regardless of NMOS/PMOS polarity.

*_pref and *_ncasc are the constructed bias generator’s internal reference gates (pref/ncasc in synthesizer/config/bias_legs.yaml, slot-prefixed to bias_gen_pref/bias_gen_ncasc on assembly) — the PMOS-side mirror reference and the pref branch’s wide-swing cascode level; devices gated by them are bias devices, not signal devices.

Parameters:

device (Device)

Return type:

bool